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1 ? fn6033.2 ISL43120, isl43121, isl43122, isl43210 low-voltage, single supply, dual spst, spdt analog switches the intersil ISL43120, isl43121, isl43122 and isl43210 devices are precision, bidirectional, dual analog switches designed to operate from a single +2.7v to +12v supply. targeted applications include battery powered equipment that benefit from the devices? low power consumption (5 w), low leakage currents (100pa max), and fast switching speeds (t on = 28ns, t off = 20ns). cell phones, for example, often face asic functionality limitations. the number of analog input or gpio pins may be lim ited and digital geometries are not well suited to analog switch performance. this family of parts may be used to ?mux-in? additional functionality while reducing asic design risk. some of the smallest packages are available, alleviating board space limitations, and making intersil?s newest line of low-voltage switches an ideal solution. the ISL43120, isl43121, isl43122 are dual single- pole/single-throw (spst) devices. the ISL43120 has two normally open (no) switches; the isl43121 has two normally closed (nc) switches; the isl43122 has one no and one nc switch and can be used as an spdt. the isl43210 is a committed spdt, which is perfect for use in 2-to-1 multiplexer applications. related literature ? technical brief tb363 ?guidelines for handling and processing moisture sensitive surface mount devices (smds)? ? application note an557 ?recommended test procedures for analog switches? features ? fully specified at 12v, 5v, and 3.3v supplies for 10% tolerances ? on resistance (r on ) . . . . . . . . . . . . . . . . . . . . . . . . . 19 ? ?r on matching between channels . . . . . . . . . . . . . . . . . . <1 ? ? low charge injection . . . . . . . . . . . . . . . . . . . . . . . 5pc (max) ? single supply operation . . . . . . . . . . . . . . . . . +2.7v to +12v ? low power consumption (p d ) . . . . . . . . . . . . . . . . . . . .<5 w ? low leakage current. . . . . . . . . . . . . . . . . . . . . . . . . 10na ? fast switching action -t on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28ns -t off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20ns ? guaranteed break-before-make (isl43122/isl43210 only) ? minimum 2000v esd protection per method 3015.7 ? ttl, cmos compatible ? available in sot-23 packaging ? pb-free available applications ? battery powered, handheld, and portable equipment - cellular/mobile phones - pagers - laptops, notebooks, palmtops ? communications systems - radios, adsl modems - pbx, pabx ? test & measurement equipment - ultrasound - computerized tomography (ct) scanner - magnetic resonance image (mri) - position emission tomography (pet) scanner - electrocardiograph ? heads-up displays ? audio and video switching ? various circuits - +3v/+5v dacs and adcs - sample and hold circuits - digital filters - operational amplifier gain switching networks - high frequency analog switching - high speed multiplexing - integrator reset circuits table 1. features at a glance ISL43120 isl43121 isl43122 isl43210 number of switches 222 1 sw 1 / sw 2 no/no nc/nc no/nc spdt or 2 x 1 mux 3.3v r on 32 ? 32 ? 32 ? 32 ? 3.3v t on /t off 40ns/20ns 40ns/20ns 40ns/20ns 40ns /20ns 5v r on 19 ? 19 ? 19 ? 19 ? 5v t on /t off 28ns/20ns 28ns/20ns 28ns/20ns 28ns/20ns 12v r on 11 ? 11 ? 11 ? 11 ? 12v t on /t off 25ns/17ns 25ns/17ns 25ns/17ns 25ns/17ns packages 8 ld sot-23 6 ld sot-23 data sheet july 2004 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2003, 2004. all rights reserved all other trademarks mentioned are the property of their respective owners.
2 pinouts (note 1) ISL43120 (sot-23) top view isl43121 (sot-23) top view isl43122 (sot-23) top view isl43210 (sot-23) top view note: 1. switches shown for logic ?0? input. no 1 v+ in 2 com 2 com 1 gnd no 2 in 1 6 7 8 5 1 2 3 4 nc 1 v+ in 2 com 2 com 1 gnd nc 2 in 1 6 7 8 5 1 2 3 4 no 1 v+ in 2 com 2 com 1 gnd nc 2 in 1 6 7 8 5 1 2 3 4 4 5 6 1 2 3 in v+ gnd no nc com truth table logic ISL43120 isl43121 isl43122 isl43210 sw 1, 2 sw 1, 2 sw 1 sw 2 pin nc pin no 0 off on offononoff 1 on off on off off on note: logic ?0? 0.8v. logic ?1? 2.4v. pin descriptions pin function v+ system power supply input (+2.7v to +12v) gnd ground connection in digital control input com analog switch common pin no analog switch normally open pin nc analog switch normally closed pin n.c. no internal connection ordering information part no. (brand) temp. range (c) package pkg. dwg. # ISL43120ih-t (120i) -40 to 85 8 ld sot-23 tape and reel p8.064 isl43121ih-t (121i) -40 to 85 8 ld sot-23 tape and reel p8.064 isl43122ih-t (122i) -40 to 85 8 ld sot-23 tape and reel p8.064 isl43122ihz-t (122i) (note) -40 to 85 8 ld sot-23 tape and reel (pb-free) p8.064 isl43210ih-t (123i) -40 to 85 6 ld sot-23 tape and reel p6.064 isl43210ihz-t (123i) (note) -40 to 85 6 ld sot-23 tape and reel (pb-free) p6.064 note: intersil pb-free products em ploy special pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both snpb and pb-free soldering operations. intersil pb-free products are msl classified at pb-free peak reflow te mperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020b. ISL43120, isl43121, isl43122, isl43210
3 absolute maximum rati ngs thermal information v+ to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15v input voltages in (note 2). . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((v+) + 0.3v) no, nc (note 2) . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((v+) + 0.3v) output voltages com (note 2) . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((v+) + 0.3v) continuous current (any terminal) . . . . . . . . . . . . . . . . . . . . . 30ma peak current no, nc, or com (pulsed 1ms, 10% duty cycle, max) . . . . . . . . . . . . . . . . . . 40ma esd rating (per mil-std-883 method 3015). . . . . . . . . . . . . .>2kv operating conditions temperature range isl43xxxih-t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40c to 85c thermal resistance (typical, note 3) ja (c/w) 6 ld sot-23 package . . . . . . . . . . . . . . . . . . . . . . . 230 8 ld sot-23 package . . . . . . . . . . . . . . . . . . . . . . . 215 maximum junction temperature (plastic package) . . . . . . . 150c moisture sensitivity (see technical brief tb363) other package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . level 1 8 ld sot-23 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . level 2 maximum storage temperature range. . . . . . . . . . . . . -65c to 150c maximum lead temperature (soldering 10s) . . . . . . . . . . . . 300c (lead tips only) caution: stresses above those listed in ?abs olute maximum ratings? may cause permanent dam age to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. notes: 2. signals on nc, no, com, or in exceeding v+ or gnd are clamped by internal diodes. limit forward diode current to maximum curr ent ratings. 3. ja is measured with the component mounted on a low effective ther mal conductivity test board in free air. see tech brief tb379 fo r details. electrical specifications - 5v supply test conditions: v+ = +4.5v to +5.5v, gnd = 0v, v inh = 2.4v, v inl = 0.8v (note 4), unless otherwise specified parameter test conditions temp (c) (note 5) min typ (note 5) max units analog switch characteristics analog signal range, v analog full 0 - v+ v on resistance, r on v+ = 4.5v, i com = 1.0ma, v no or v nc = 3.5v (see figure 5) 25 - 19 30 ? full - 23 40 ? r on matching between channels, ? r on v+ = 5v, i com = 1.0ma, v no or v nc = 3.5v 25 - 0.8 2 ? full - 1 4 ? r on flatness, r flat(on) v+ = 5v, i com = 1.0ma, v no or v nc = 1v, 2v, 3v full - 7 8 ? no or nc off leakage current, i no(off) or i nc(off) v+ = 5.5v, v com = 1v, 4.5v, v no or v nc = 4.5v, 1v (note 6) 25 -0.1 0.01 0.1 na full -5 - 5 na com off leakage current, i com(off) v+ = 5.5v, v com = 4.5v, 1v, v no or v nc = 1v, 4.5v (note 6) 25 -0.1 - 0.1 na full -5 - 5 na com on leakage current, i com(on) v + = 5.5v, v com = 1v, 4.5v, or v no or v nc = 1v, 4.5v, or floating (note 6) 25 -0.2 - 0.2 na full -10 - 10 na dynamic characteristics turn-on time, t on v no or v nc = 3v, r l =1k ? , c l = 35pf, v in = 0 to 3v (see figure 1) 25 - 28 75 ns full - 40 150 ns turn-off time, t off v no or v nc = 3v, r l =1k ? , c l = 35pf, v in = 0 to 3v (see figure 1) 25 - 20 50 ns full - 30 100 ns break-before-make time delay (isl43122, isl43210), t d r l = 300 ? , c l = 35pf, v no = v nc = 3v, v in = 0 to 3v (see figure 3) full 3 10 - ns charge injection, q c l = 1.0nf, v g = 0v, r g = 0 ? (see figure 2) 25 - 3 5 pc off isolation r l = 50 ? , c l = 5pf, f = 1mhz (see figure 4) 25 - 76 - db crosstalk (channel-to-channel) r l = 50 ? , c l = 5pf, f = 1mhz (see figure 6) 25 - -105 - db power supply rejection ratio r l = 50 ? , c l = 5pf, f = 1mhz 25 - 60 - db no or nc off capacitance, c off f = 1mhz, v no or v nc = v com = 0v (see figure 7) 25 - 8 - pf com off capacitance, c com(off) f = 1mhz, v no or v nc = v com = 0v (see figure 7) 25 - 8 - pf ISL43120, isl43121, isl43122, isl43210
4 com on capacitance, c com(on) f = 1mhz, v no or v nc = v com = 0v (see figure 7), ISL43120, isl43121, isl43122 25 - 21 - pf f = 1mhz, v no or v nc = v com = 0v (see figure 7), isl43210 25 - 28 - pf power supply characteristics power supply range full 2.7 - 12 v positive supply current, i+ v+ = 5.5v, v in = 0v or v+, all channels on or off full -1 0.0001 1 a digital input characteristics input voltage low, v inl full - - 0.8 v input voltage high, v inh full 2.4 - - v input current, i inh , i inl v+ = 5.5v, v in = 0v or v+ full -1 - 1 a notes: 4. v in = input voltage to perform proper function. 5. the algebraic convention, whereby the most negative value is a minimum and the most pos itive a maximum, is used in this data sheet. 6. leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25c. electrical specifications - 3.3v supply test conditions: v+ = +3.0v to +3.6v, gnd = 0v, v inh = 2.4v, v inl = 0.8v (note 4), unless otherwise specified parameter test conditions temp (c) (note 5) min typ (note 5) max units analog switch characteristics analog signal range, v analog full 0 - v+ v on resistance, r on v+ = 3v, i com = 1.0ma, v no or v nc = 1.5v 25 - 32 50 ? full - 40 60 ? r on matching between channels, ? r on v+ = 3.3v, i com = 1.0ma, v no or v nc = 1.5v 25 - 0.8 2 ? full - 1 4 ? r on flatness, r flat(on) v+ = 3.3v, i com = 1.0ma, v no or v nc = 0.5v, 1v, 1.5v 25 - 6 8 ? full - 7 12 ? no or nc off leakage current, i no(off) or i nc(off) v+ = 3.6v, v com = 1v, 3v, v no or v nc = 3v, 1v (note 6) 25 -0.1 0.01 0.1 na full -5 - 5 na com off leakage current, i com(off) v+ = 3.6v, v com = 3v, 1v, v no or v nc = 1v, 3v (note 6) 25 -0.1 0.01 0.1 na full -5 - 5 na com on leakage current, i com(on) v + = 3.6v, v com = 1v, 3v, or v no or v nc = 1v, 3v, or floating (note 6) 25 -0.2 - 0.2 na full -10 - 10 na dynamic characteristics turn-on time, t on v no or v nc = 1.5v, r l =1k ? , c l = 35pf, v in = 0 to 3v 25 - 40 120 ns full - 60 200 ns turn-off time, t off v no or v nc = 1.5v, r l =1k ? , c l = 35pf, v in = 0 to 3v 25 - 20 50 ns full - 30 120 ns break-before-make time delay (isl43122, isl43210), t d r l = 300 ? , c l = 35pf, v no or v nc = 1.5v, v in = 0 to 3v full 3 20 - ns charge injection, q c l = 1.0nf, v g = 0v, r g = 0 ? 25 - 1 5 pc off isolation r l = 50 ? , c l = 5pf, f = 1mhz 25 - 76 - db crosstalk (channel-to-channel) 25 - -105 - db power supply rejection ratio r l = 50 ? , c l = 5pf, f = 1mhz 25 - 56 - db no or nc off capacitance, c off f = 1mhz, v no or v nc = v com = 0v 25 - 8 - pf electrical specifications - 5v supply test conditions: v+ = +4.5v to +5.5v, gnd = 0v, v inh = 2.4v, v inl = 0.8v (note 4), unless otherwise specified (continued) parameter test conditions temp (c) (note 5) min typ (note 5) max units ISL43120, isl43121, isl43122, isl43210
5 com off capacitance, c com(off) f = 1mhz, v no or v nc = v com = 0v 25 - 8 - pf com on capacitance, c com(on) f = 1mhz, v no or v nc = v com = 0v, ISL43120, isl43121, isl43122 25 - 21 - pf f = 1mhz, v no or v nc = v com = 0v, isl43210 25 - 28 - pf power supply characteristics positive supply current, i+ v+ = 3.6v, v in = 0v or v+, all channels on or off full -1 - 1 a digital input characteristics input voltage low, v inl full - - 0.8 v input voltage high, v inh full 2.4 - - v input current, i inh , i inl v+ = 3.6v, v in = 0v or v+ full -1 - 1 a electrical specifications - 12v supply test conditions: v+ = +10.8v to +13v, gnd = 0v, v inh = 4v, v inl = 0.8v (note 4), unless otherwise specified parameter test conditions temp (c) (note 5) min typ (note 5) max units analog switch characteristics analog signal range, v analog full 0 - v+ v on resistance, r on v+ = 10.8v, i com = 1.0ma, v no or v nc = 10v 25 - 11 20 ? full - 15 25 ? r on matching between channels, ? r on v+ = 12v, i com = 1.0ma, v no or v nc = 10v 25 - 0.8 2 ? full - 1 4 ? r on flatness, r flat(on) v+ = 12v, i com = 1.0ma, v no or v nc = 3v, 6v, 9v 25 - 1 4 ? full - - 6 ? no or nc off leakage current, i no(off) or i nc(off) v+ = 13v, v com = 1v, 12v, v no or v nc = 12v, 1v (note 6) 25 -0.1 0.01 0.1 na full -5 - 5 na com off leakage current, i com(off) v+ = 13v, v com = 12v, 1v, v no or v nc = 1v, 12v (note 6) 25 -0.1 0.01 0.1 na full -5 - 5 na com on leakage current, i com(on) v + = 13v, v com = 1v, 12v, or v no or v nc = 1v, 12v, or floating (note 6) 25 -0.2 - 0.2 na full -10 - 10 na dynamic characteristics turn-on time, t on v no or v nc = 10v, r l =1k ? , c l = 35pf, v in = 0 to 4v 25 - 25 35 ns full - 35 55 ns turn-off time, t off v no or v nc = 10v, r l =1k ? , c l = 35pf, v in = 0 to 4v 25 - 17 30 ns full - 26 50 ns break-before-make time delay (isl43122, isl43210), t d r l = 300 ? , c l = 35pf, v no or v nc = 10v, v in = 0 to 4v full 0 2 ns charge injection, q c l = 1.0nf, v g = 0v, r g = 0 ? 25 - 5 15 pc off isolation r l = 50 ? , c l = 5pf, f = 1mhz 25 - 76 - db crosstalk (channel-to-channel) 25 - -105 - db power supply rejection ratio r l = 50 ? , c l = 5pf, f = 1mhz 25 - 63 - db no or nc off capacitance, c off f = 1mhz, v no or v nc = v com = 0v 25 - 8 - pf com off capacitance, c com(off) f = 1mhz, v no or v nc = v com = 0v 25 - 8 - pf com on capacitance, c com(on) f = 1mhz, v no or v nc = v com = 0v, ISL43120, isl43121, isl43122 25 - 21 - pf f = 1mhz, v no or v nc = v com = 0v, isl43210 25 - 28 - pf electrical specifications - 3.3v supply test conditions: v+ = +3.0v to +3.6v, gnd = 0v, v inh = 2.4v, v inl = 0.8v (note 4), unless otherwise specified (continued) parameter test conditions temp (c) (note 5) min typ (note 5) max units ISL43120, isl43121, isl43122, isl43210
6 power supply characteristics positive supply current, i+ v+ = 13v, v in = 0v or v+, all channels on or off full -1 - 1 a digital input characteristics input voltage low, v inl full - - 0.8 v input voltage high, v inh full 4 3 - v input current, i inh , i inl v+ = 13v, v in = 0v or v+ full -1 - 1 a test circuits and waveforms logic input waveform is inverted for switches that have the opposite logic sense. figure 1a. measurement points repeat test for all switches. c l includes fixture and stray capacitance. figure 1b. test circuit figure 1. switching times figure 2a. measurement points figure 2b. test circuit figure 2. charge injection electrical specifications - 12v supply test conditions: v+ = +10.8v to +13v, gnd = 0v, v inh = 4v, v inl = 0.8v (note 4), unless otherwise specified (continued) parameter test conditions temp (c) (note 5) min typ (note 5) max units 50% t r < 20ns t f < 20ns t off 90% 3v or 4v 0v v no 0v t on logic input switch input switch output 90% v out v out v (no or nc) r l r l r on () + ------------------------------ = switch input logic input v out r l c l com no or nc in 1k ? 35pf gnd v+ c v out ? v out on off on q = ? v out x c l switch output logic input v+ 0v c l v out r g v g gnd com no or nc v+ c logic input in ISL43120, isl43121, isl43122, isl43210
7 figure 3a. measurement points (isl43122 only) c l includes fixture and stray capacitance. figure 3b. test circuit (isl43122 only) figure 3c. measurement points (isl43210 only) c l includes fixture and stray capacitance. figure 3d. test circuit (isl43210 only) figure 3. break-before-make time figure 4. off isolation test circuit figure 5. r on test circuit test circuits and waveforms (continued) 90% 3v or 4v 0v t d 0v logic input switch output switch output 90% t d 0v v out1 v out2 logic input in 1 com 1 r l1 c l1 v out1 300 ? 35pf com 2 r l2 c l2 v out2 300 ? 35pf no1 nc2 gnd in 2 v nx v+ c 90% 3v or 4v 0v t d logic input switch output 0v v out logic input in com r l c l v out 35pf 300 ? no nc v+ gnd v nx c analyzer r l signal generator v+ c 0v or v inh no or nc com in x gnd v+ c 0.8v or v inh no or nc com in gnd v nx v 1 r on = v 1 /1ma 1ma ISL43120, isl43121, isl43122, isl43210
8 detailed description the ISL43120?isl43122 and isl43210 bidirectional, dual analog switches offer precis e switching capability from a single 2.7v to 12v supply with low on-resistance (19 ? ) and high speed operation (t on = 28ns, t off = 20ns). the devices are especially well suited to portable battery powered equipment thanks to the low operating supply voltage (2.7v), low power consumption (5 w), low leakage currents (100pa max), and the tiny sot-23 packaging. high frequency applications also benefit from the wide bandwidth, and the very high off isolation and crosstalk rejection. supply sequencing and overvoltage protection with any cmos device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the ic. all i/o pins contain esd protection diodes from the pin to v+ and gnd (see figure 8). to prevent forward biasing these diodes, v+ must be applied before any input signals, and input signal voltages must remain between v+ and gnd. if these conditions cannot be guaranteed, then one of the following two protection methods should be employed. logic inputs can easily be protected by adding a 1k ? resistor in series with the input (see figure 8). the resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. adding a series resistor to the switch input defeats the purpose of using a low r on switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see figure 8). these additional diodes limit the analog signal from 1v below v+ to 1v above gnd. the low leak age current performance is unaffected by this approach, but the switch resistance may increase, especially at low supply voltages. power-supply considerations the isl43xxx construction is ty pical of most cmos analog switches, except that they have only two supply pins: v+ and gnd. v+ and gnd drive the internal cmos switches and set their analog voltage limits. unlike switches with a 13v maximum supply voltage, the isl43xxx 15v maximum supply voltage provides plenty of room for the 10% tolerance of 12v supplies, as well as room for overshoot and noise spikes. the minimum recommended supply voltage is 2.7v. it is important to note that the inpu t signal range, switching times, and on-resistance degrade at lower supply voltages. refer to the electrical specification tables and typical performance curves for details. figure 6. crosstalk test circuit figure 7. capacitance test circuit test circuits and waveforms (continued) 0v or 2.4v analyzer v+ c no1 or nc1 signal generator r l gnd in 1 com1 in 2 50 ? 0v or v inh nc com2 no2 or nc2 v+ c gnd no or nc com in x impedance analyzer 0v or v inh figure 8. overvoltage protection gnd v com v no or nc optional protection v+ in x diode optional protection diode optional protection resistor ISL43120, isl43121, isl43122, isl43210
9 v+ and gnd also power the internal logic and level shiftier. the level shiftier convert the inpu t logic levels to switched v+ and gnd signals to drive the analog switch gate terminals. this family of switches c annot be operated with bipolar supplies, because the input switching point becomes negative in this configuration. logic-level thresholds this switch family is ttl compatible (0.8v and 2.4v) over a supply range of 3v to 11v (see figure 15). at 12v the v ih level is about 2.5v. this is still below the ttl guaranteed high output minimum level of 2.8v, but noise margin is reduced. for best results with a 12v supply, use a logic family the provides a v oh greater than 3v. the digital input stages draw supply current whenever the digital input voltage is not at one of the supply rails. driving the digital input signals from g nd to v+ with a fast transition time minimizes power dissipation. high-frequency performance in 50 ? systems, signal response is reasonably flat even past 300mhz (see figure 16). figure 16 also illustrates that the frequency response is very consistent over a wide v+ range, and for varying analog signal levels. an off switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feedthrough from a switch?s input to its output. off isolation is the resistance to this feedthrough, while crosstalk indicates the amount of feedthrough from one switch to another. figure 17 details the high off isolation and crosstalk rejection provided by this family. at 10mhz, off isolation is about 50db in 50 ? systems, decreasing approximately 20db per decade as frequency increases. higher load impedances decrease off isolation and crosstalk rejection due to the voltage divider action of the switch off impedance and the load impedance. leakage considerations reverse esd protection diodes are internally connected between each analog-signal pin and both v+ and gnd. one of these diodes conducts if any analog signal exceeds v+ or gnd. virtually all the analog leakage current comes from the esd diodes to v+ or gnd. although the esd diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. each is biased by either v+ or gnd and the analog signal. this means their leakages will vary as the signal varies. the difference in the two diode leakages to the v+ and gnd pins constitutes the analog- signal-path leakage current. all analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. this is why both sides of a given switch can show leakage curren ts of the same or opposite polarity. there is no connection between the analog signal paths and v+ or gnd. typical performance curves t a = 25c, unless otherwise specified figure 9. on resistance vs supply voltage figure 10. on resistance vs switch voltage r on ( ? ) v+ (v) 35 25 15 5 3 4 5 6 7 8 9 10 11 12 13 25c -40c 85c 10 20 30 40 r on ( ? ) v com (v) 15 5 0 4 6 8 10 12 10 20 2 20 15 25 10 25 20 30 15 40 45 v+ = 3.3v v+ = 5v v+ = 12v 25c -40c 85c 25c -40c 85c 25c -40c 85c 30 35 ISL43120, isl43121, isl43122, isl43210
10 figure 11. r on match vs switch voltage figure 12. charge inject ion vs switch voltage figure 13. turn - on time vs supply voltage figure 14. turn - off time vs supply voltage figure 15. digital switching point vs supply voltage figure 16. frequency response typical performance curves t a = 25c, unless otherwise specified (continued) -40c ? r on ( ? ) v com (v) 0.1 0 0 4 6 8 10 12 0.05 0.15 2 v+ = 3.3v v+ = 5v v+ = 12v 25c -40c 85c 0.1 0.05 0.15 0 0.2 0.25 25c -40c 85c 0.2 0.1 0.3 0 0.4 0.5 25c -40c 85c 85c 25c q (pc) v com (v) 60 40 20 0 -20 0 4681012 -10 10 30 50 v+ = 3.3v 2 v+ = 5v v+ = 12v t on (ns) v+ (v) 100 80 60 40 20 23456789101112 30 50 70 90 -40c 25c 85c t off (ns) v+ (v) 35 30 25 20 15 23456789101112 25c -40c 85c -40c v+ (v) 25 3.0 2.5 2.0 1.5 1.0 0.5 34 678910111213 v inh and v inl (v) -40c 85c 25c -40c 85c v inh v inl 85c 25c frequency (mhz) 0 -3 -6 normalized gain (db) gain phase v+ = 3.3v to 12v 0 20 40 60 80 100 phase (degrees) 1 10 100 600 v in = 0.2v p-p to 2.5v p-p (v+ = 3.3v) v in = 0.2v p-p to 4v p-p (v+ = 5v) v in = 0.2v p-p to 5v p-p (v+ = 12v) r l = 50 ? ISL43120, isl43121, isl43122, isl43210
11 die characteristics substrate potential (powered up): gnd transistor count: ISL43120: 66 isl43121: 66 isl43122: 66 isl43210: 58 process: si gate cmos figure 17. crosstalk and off isolation figure 18. psrr vs frequency typical performance curves t a = 25c, unless otherwise specified (continued) frequency (hz) 1k 100k 1m 100m 500m 10k 10m -110 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 crosstalk (db) off isolation (db) 110 10 20 30 40 50 60 70 80 90 100 isolation crosstalk v+ = 3v to 13v frequency (mhz) 1 10 100 1000 0.3 30 40 50 psrr (db) 60 70 80 20 10 0 r l = 50 ? v+ = 12v, switch on v+ = 3.3v, switch on v+ = 3.3v, switch off v+ = 12v, switch off ISL43120, isl43121, isl43122, isl43210
12 ISL43120, isl43121, isl43122, isl43210 small outline transistor plastic packages (sot23-6) d e1 e c l e b c l a2 a a1 c l 0.20 (0.008) m 0.10 (0.004) c c -c- seating plane 12 3 4 5 6 e1 c l c view c view c l r1 r 4x 1 4x 1 gauge plane l1 seating l2 c plane c base metal with c1 b1 plating b p6.064 6 lead small outline transistor plastic package symbol inches millimeters notes min max min max a 0.036 0.057 0.90 1.45 - a1 0.000 0.0059 0.00 0.15 - a2 0.036 0.051 0.90 1.30 - b 0.012 0.020 0.30 0.50 - b1 0.012 0.018 0.30 0.45 c 0.003 0.009 0.08 0.22 6 c1 0.003 0.008 0.08 0.20 6 d 0.111 0.118 2.80 3.00 3 e 0.103 0.118 2.60 3.00 - e1 0.060 0.068 1.50 1.75 3 e 0.0374 ref 0.95 ref - e1 0.0748 ref 1.90 ref - l 0.014 0.022 0.35 0.55 4 l1 0.024 ref. 0.60 ref. l2 0.010 ref. 0.25 ref. n6 65 r 0.004 - 0.10 - r1 0.004 0.010 0.10 0.25 0 o 8 o 0 o 8 o - rev. 3 9/03 notes: 1. dimensioning and tolerance per asme y14.5m-1994. 2. package conforms to eiaj sc-74 and jedec mo178ab. 3. dimensions d and e1 are exclusiv e of mold flash, protrusions, or gate burrs. 4. footlength l measured at reference to gauge plane. 5. ?n? is the number of terminal positions. 6. these dimensions apply to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. 7. controlling dimension: millime ter. converted inch dimen- sions are for reference only
13 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality ce rtifications can be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that da ta sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com ISL43120, isl43121, isl43122, isl43210 small outline transistor plastic packages (sot23-8) d e 1 e c l e b c l a2 a a1 c l 0.20 (0.008) m 0.10 (0.004) c c -c- seating plane 1234 5 6 87 e1 c l c view c view c l r1 r 4x 1 4x 1 gauge plane l1 seating l2 c plane c base metal with c1 b1 plating b p8.064 8 lead small outline transistor plastic package symbol inches millimeters notes min max min max a 0.036 0.057 0.90 1.45 - a1 0.000 0.0059 0.00 0.15 - a2 0.036 0.051 0.90 1.30 - b 0.009 0.015 0.22 0.38 - b1 0.009 0.013 0.22 0.33 c 0.003 0.009 0.08 0.22 6 c1 0.003 0.008 0.08 0.20 6 d 0.111 0.118 2.80 3.00 3 e 0.103 0.118 2.60 3.00 - e1 0.060 0.067 1.50 1.70 3 e 0.0256 ref 0.65 ref - e1 0.0768 ref 1.95 ref - l 0.014 0.022 0.35 0.55 4 l1 0.024 ref. 0.60 ref. l2 0.010 ref. 0.25 ref. n8 85 r 0.004 - 0.10 - r1 0.004 0.010 0.10 0.25 0 o 8 o 0 o 8 o - rev. 2 9/03 notes: 1. dimensioning and tolerance per asme y14.5m-1994. 2. package conforms to eiaj sc-74 and jedec mo178ba. 3. dimensions d and e1 are exclusiv e of mold flash, protrusions, or gate burrs. 4. footlength l measured at reference to gauge plane. 5. ?n? is the number of terminal positions. 6. these dimensions apply to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. 7. controlling dimension: millime ter. converted inch dimen- sions are for reference only

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